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关键词:工业控制 测试测量 工业过程控制 可编逻辑控制器(PLC)

时间:2018-07-31 11:13:39       作者:ADI       来源:中电网

ADI公司的LTC2357-18是18位低噪音4路同时取样SAR ADC,具有缓冲差分,宽共模范围微微安培(picoamp)输入.每路吞吐量350ksps,在85℃/125℃ 时最大限度输入漏电500pA/12nA, ±3.5LSB IN,保证18位不丢码,工作电压5V,容纳±10.24V, 0V 到10.24V, ±5.12V, 或 0V to到5.12V,主要用在可编逻辑控制器(PLC),工业过程控制,测试测量和动力线监测.本文介绍了LTC2358主要特性,框图和应用框图,演示板DC2365A主要特性,电路图,材料清单和PCB设计图.

The LTC.2357-18 is an 18-bit, low noise 4-channelsimultaneous sampling successive approximation register(SAR) ADC with buffered differential, wide commonmode range picoamp inputs. Operating from a 5V lowvoltage supply, flexible high voltage supplies, and usingthe internal reference and buffer, each channel of thisSoftSpan™ ADC can be independently configured on aconversion-by-conversion basis to accept ±10.24V, 0V to 10.24V, ±5.12V, or 0V to 5.12V signals. Individual channelsmay also be disabled to increase throughput on theremaining channels.

The integrated picoamp-input analog buffers, wideinput common mode range and 128dB CMRR of theLTC2357-18 allow the ADC to directly digitize a varietyof signals using minimal board space and power. Thisinput signal flexibility, combined with ±3.5LSB INL, nomissing codes at 18 bits, and 96.4dB SNR, makes theLTC2357-18 an ideal choice for many high voltage applicationsrequiring wide dynamic range.

The LTC2357-18 supports pin-selectable SPI CMOS (1.8Vto 5V) and LVDS serial interfaces. Between one and fourlanes of data output may be employed in CMOS mode,allowing the user to optimize bus width and throughput.

LTC2358主要特性:

nnSimultaneous Sampling of 4 Buffered Channels
nn350ksps per Channel Throughput
nn500pA/12nA Max Input Leakage at 85℃/125℃
nn±3.5LSB INL (Maximum, ±10.24V Range)
nnGuaranteed 18-Bit, No Missing Codes
nnDifferential, Wide Common Mode Range Inputs
nnPer-Channel SoftSpan Input Ranges:
nn±10.24V, 0V to 10.24V, ±5.12V, 0V to 5.12V
nn±12.5V, 0V to 12.5V, ±6.25V, 0V to 6.25V
nn96.4dB Single-Conversion SNR (Typical)
nn−110dB THD (Typical) at fIN = 2kHz
nn128dB CMRR (Typical) at fIN = 200Hz
nnRail-to-Rail Input Overdrive Tolerance
nnIntegrated Reference and Buffer (4.096V)
nnSPI CMOS (1.8V to 5V) and LVDS Serial I/O
nnInternal Conversion Clock, No Cycle Latency
nn175mW Power Dissipation (44mW/Ch Typical)
nn 48-Lead (7mm x 7mm) LQFP Package

LTC2358应用:

nn Programmable Logic Controllers
nn Industrial Process Control
nnPower Line Monitoring
nnTest and Measurement

图1. LTC2358框图(CMOS I/O模式)

图2. LTC2358框图(LVDS I/O模式)

图3. LTC2358应用框图

演示板DC2365A

Demonstration circuit 2365A highlights the LTC®2358family of buffered input ADCs. The LTC2358/LTC2357/LTC2353/LTC2333 are low noise, high speed, 16-/18-bit successive approximation register (SAR) ADCs withintegrated front end buffers. These ADCs accept a widecommon mode range. Pico-amp inputs and high CMRRenable these ADCs to connect directly to a wide range ofsensors without compromising measurement accuracy.

The following text refers to the LTC2358-18 but appliesto all parts in the family, the only differences being thenumber of bits, number of channels and the maximumsample rate. The LTC2358-18 has a flexible SoftSpan™interface that allows conversion-by-conversion control ofthe input voltage span on a per-channel basis. An internal2.048V reference and 2X buffer simplify basic operationwhile an external reference can be used to increase theinput range and the SNR of the ADC.

The DC2365A demonstrates the DC and AC performance ofthe LTC2358-18 in conjunction with the DC590/DC2026 andDC890 data collection boards. Use the DC590/DC2026 todemonstrate DC performance such as peak-to-peak noiseand DC linearity. Use the DC890 if precise sampling ratesare required or to demonstrate AC performance such asSNR, THD, SINAD and SFDR. The DC2365A is intendedto demonstrate recommended grounding, componentplacement and selection, routing and bypassing for thisADC. A simple driver circuit for the analog inputs is alsopresented.

图4.演示板DC2365A连接图

图5.±10.24V伪差分DC耦合驱动器

图6.演示板DC2365A电路图(1)

图7.演示板DC2365A电路图(2)

图8.演示板DC2365A电路图(3)

图9.演示板DC2365A电路图(4)
演示板DC2365A材料清单:











图10.演示板DC2365A PCB设计图(1)

图11.演示板DC2365A PCB设计图(2)

图12.演示板DC2365A PCB设计图(3)

图13.演示板DC2365A PCB设计图(4)

图14.演示板DC2365A PCB设计图(5)

图15.演示板DC2365A PCB设计图(6)

图16.演示板DC2365A PCB设计图(7)

图17.演示板DC2365A PCB设计图(8)

图18.演示板DC2365A PCB设计图(9)

图19.演示板DC2365A PCB设计图(10)

图20.演示板DC2365A PCB设计图(11)

图21.演示板DC2365A PCB设计图(12)

图22.演示板DC2365A PCB设计图(13)
详情请见:
http://www.analog.com/media/en/technical-documentation/data-sheets/235718f.pdf
http://www.analog.com/media/en/dsp-documentation/evaluation-kit-manuals/dc2365afa.pdf
以及http://www.analog.com/media/en/technical-documentation/eval-board-schematic/DC2365A2-SCH.PDF
235718f.pdf
dc2365afa.pdf
DC2365A2-SCH.PDF
DC2365A.zip

 

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